This invention relates to an image processor for performing parallel partial image processing such as spatial convolution or a non-linear neighbor arithmetic operation.
In general, digital image processing requires the processing of two-dimensionally arranged image data which is one of the difficulties of current Von Neumann type computers. Image processing requires great time for arithmetic operations and a large storage capacity. Thus, processing of image data at high speed by parallel processing has been attempted, but it was very difficult to process all image data in parallel. One technique in which partial images of m rows.times.n columns are processed in parallel is widely used. In such partial neighbor arithmetic operations, many functions such as averaging, differential operation or feature extraction can be realized. Thus, parallel partial image processing has been tried using hardware, but almost no large-scale integrated hardware is realized yet. Moreover, since the hardware for image processing is required to have a high-speed processing capability, spatial hardware is often used for each image processing, and thus it is desired to develop high-speed general-purpose hardware for image processing.
It is an object of the invention to provide an image processor which is suitable for high-speed processing of a general purpose and has architecture capable of large-scale integration.